UOW Primary Regional Library
  • Library Timings During Midterm Break
  • 24th March to 06th April 2019
  • 07:30 AM - 6:00 PM (Sunday to Thursday)
  • 10:00 AM - 5:00 PM (Saturday)
  • Closed on Friday

Course reserves for ECTE433

  1. Term: Autumn18
  2. Department: Engineering
  3. Course number: Embedded Systems
  4. Instructors:
    • Stefano Fasciani
Title Author Item type Location Collection Call number Copy number Status Date due Notes Link
Real world FPGA design with Verilog Coffman, Ken, REGULAR University of Wollongong in Dubai
Main Collection
621.395 CO RE Available Autumn 2018
The design warrior's guide to FPGAs : Maxfield, Clive, REGULAR University of Wollongong in Dubai
Main Collection
621.395 MA DE Available Autumn 2018
Circuit design with VHDL Pedroni, Volnei A. REGULAR University of Wollongong in Dubai
Main Collection
621.395 PE CI Available Autumn 2018

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